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| PROFET(R) Preliminary Data Sheet BTS640S2 Smart Highside Power Switch Features * Overload protection * Current limitation * Short circuit protection * Thermal shutdown * Overvoltage protection (including load dump) * Fast demagnetization of inductive loads * Reverse battery protection1) * Undervoltage and overvoltage shutdown with auto-restart and hysteresis * Open drain diagnostic output * Proportional load current sense * CMOS compatible input * Loss of ground and loss of Vbb protection * Electrostatic discharge (ESD) protection Product Summary Overvoltage protection Operating voltage On-state resistance Load current (ISO) Current limitation Current sense ratio Vbb(AZ) Vbb(on) RON IL(ISO) IL(SCr) IL/IIS 41 V 5.0 ... 34 V 30 m 12.6 A 24 A 5000 TO-220AB/7 Application * C compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads * All types of resistive, inductive and capacitve loads * Replaces electromechanical relays, fuses and discrete circuits 7 1 7 Standard SMD 1 General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS(R) technology. Fully protected by embedded protection functions. 4 + V bb Voltage source Overvoltage protection Current limit Gate protection OUT V Logic Voltage sensor Charge pump Level shifter Rectifier ESD Logic Output Voltage detection Temperature sensor Limit for unclamped ind. loads 6, 7 IL 3 1 IN Current Sense Load ST R O 5 GND IS I IS R GND IS Signal GND (R) PROFET Load GND 2 1) With external current limit (e.g. resistor RGND=150 ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load. Semiconductor Group 1 03.97 Preliminary Data Sheet BTS640S2 Pin 1 2 3 4 5 6 7 Symbol ST GND IN Vbb IS OUT (Load, L) OUT (Load, L) Function Diagnostic feedback, invers to input level Logic ground Input, activates the power switch in case of logical high signal Positive power supply voltage, the tab is shorted to this pin Sense current output, proportional to the load current, zero in the case of current limitation of load current Output, protected high-side power output to the load. Both output pins have to be connected in parallel for operation according this spec (e.g. kILIS). Design the wiring for the max. short circuit current Maximum Ratings at Tj = 25 C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection Tj Start=-40 ...+150C Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V RI3)= 2 , RL= 1 , td= 200 ms, IN= low or high Load current (Short circuit current, see page 5) Operating temperature range Storage temperature range Power dissipation (DC), TC 25 C Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150C, TC = 150C const. IL = 12.6 A, ZL = tbd mH, 0 : Electrostatic discharge capability (ESD) IN: (Human Body Model) all other pins: acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 Symbol Vbb Vbb Values 41 30 tbd self-limited -40 ...+150 -55 ...+150 85 tbd 1.0 8.0 -10 ... +16 5.0 5.0 14 Unit V V V A C W J kV V mA VLoad dump4) IL Tj Tstg Ptot EAS VESD VIN IIN IST IIS Input voltage (DC) Current through input pin (DC) Current through status pin (DC) Current through current sense pin (DC) see internal circuit diagrams page 7 2) 3) 4) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a 150 resistor in the GND connection and a 15 k resistor in series with the status pin. A resistor for the protection of the input is integrated. RI = internal resistance of the load dump test pulse generator VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 Semiconductor Group 2 Preliminary Data Sheet BTS640S2 Thermal Characteristics Parameter and Conditions Thermal resistance Symbol min ---chip - case: RthJC junction - ambient (free air): RthJA SMD version, device on PCB5): Values typ max -- 1.47 -75 33 -Unit K/W 5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air. Semiconductor Group 3 Preliminary Data Sheet BTS640S2 Electrical Characteristics Parameter and Conditions at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (pin 4 to 6) IL = 5 A Tj=25 C: RON Tj=150 C: VON(NL) -- 27 54 30 60 -- m Output voltage drop limitation at small load currents (pin 4 to 6), see page 13 IL = 0.5 A Tj =-40...+150C: Nominal load current, ISO Norm (pin 4 to 6) VON = 0.5 V, TC = 85 C Nominal load current, device on PCB5) TA = 85 C, Tj 150 C VON 0.5 V, Output current (pin 6) while GND disconnected or GND pulled up, Vbb=30 V, VIN= 0, see diagram page 9 Turn-on time IN to 90% VOUT: Turn-off time IN to 10% VOUT: RL = 12 , Tj =-40...+150C Slew rate on 10 to 30% VOUT, RL = 12 , Tj =-40...+150C Slew rate off 70 to 40% VOUT, RL = 12 , Tj =-40...+150C Operating Parameters Operating voltage 6) Undervoltage shutdown Undervoltage restart -- 50 mV IL(ISO) IL(NOM) IL(GNDhigh) 11.4 4.0 -- 12.6 4.5 -- --8 A A mA s ton toff dV /dton -dV/dtoff 25 25 0.1 0.1 70 80 --- 150 200 1 1 V/s V/s Tj =-40...+150C: Tj =-40...+150C: Tj =-40...+25C: Tj =+150C: Undervoltage restart of charge pump Tj =-40...+25C: see diagram page 12 Tj =25...150C: Undervoltage hysteresis Vbb(under) = Vbb(u rst) - Vbb(under) Tj =-40...+150C: Overvoltage shutdown Tj =-40...+150C: Overvoltage restart Tj =-40...+150C: Overvoltage hysteresis 7) Tj =-40...+150C: Overvoltage protection Ibb=40 mA 6) 7) Vbb(on) Vbb(under) Vbb(u rst) Vbb(ucp) Vbb(under) 5.0 3.4 ----34 33 -41 --4.5 4.7 -0.5 --1 46 34 5.0 5.5 6.0 6.5 7.0 -43 ---- V V V V V V V V V Vbb(over) Vbb(o rst) Vbb(over) Vbb(AZ) At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT Vbb - 2 V See also VON(CL) in table of protection functions and circuit diagram page 8. Semiconductor Group 4 Preliminary Data Sheet BTS640S2 Parameter and Conditions at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Standby current (pin 4) VIN=0 Tj=-40...+25C: Ibb(off) Tj= 150C: IL(off) Leakage output current (included in Ibb(off)) VIN=0, Tj =-40...+150C Operating current (Pin 2)8), VIN=5 V IGND Protection Functions Initial peak short circuit current limit (pin 4 to 6) Tj =-40C: Tj =25C: =+150C: Tj Repetitive short circuit shutdown current limit Tj = Tjt (see timing diagrams, page 11) Output clamp (inductive load switch off) at VOUT = Vbb - VON(CL) IL= 1 A, Tj =-40..+150C: Thermal overload trip temperature Thermal hysteresis Reverse battery (pin 4 to 2) 9) Reverse battery voltage drop (Vout > Vbb) IL = -5 A Tj=150 C: ----- 4 12 -1.2 15 25 10 3 A A mA IL(SCp) 48 40 31 56 50 37 24 47 -10 -tbd 65 58 45 ----32 -A IL(SCr) -A V C K V mV VON(CL) Tjt Tjt -Vbb -VON(rev) 40 150 ---- Diagnostic Characteristics Current sense ratio, static on-condition, Vbb-Vout < 1 V, VIS = 0...5 V, Vbb(on) = 6.510)...27V, kILIS = IL / IIS Tj = -40C, IL = 5 A: kILIS Tj= -40C, IL= 0.5 A: , Sense off threshold 11) 4550 3300 4550 4000 -- 5000 5000 5000 5000 0 1.2 6.1 6000 8000 5550 6500 --6.9 V V Tj= 25...+150C, IL= 5 A: Tj= 25...+150C, IL = 0.5 A: VIN = 0: VON(IS) 1.0 5.4 Current sense output voltage limitation Tj = -40 ...+150C IIS = 0, IL = 5 A: VIS(lim) 8) 9) Add IST, if IST > 0, add IIN, if VIN>5.5 V Requires 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 2 and circuit page 8). 10) Valid if V bb(u rst) was exceeded before. 11) In the case of current limitation (V ON > VON(IS)) the current sense ratio kILIS is undefined zero and the diagnostic feedback potential VST is High. See figure 2b, page 10. Semiconductor Group 5 Preliminary Data Sheet BTS640S2 Parameter and Conditions at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Current sense leakage/offset current Tj = -40 ...+150C VIN=0, VIS = 0, IL = 0: IIS(LL) 0 0 -- ---- 1 10 300 A VIN=5 V, VIS = 0, IL = 0: IIS(LH) Current sense settling time to IIS static10% after 5 A, Tj= positive input slope, IL = 0 -40...+150C (not tested, specified by design) Current sense settling time to 10% of IIS static after negative input slope, IL = 5 0 A , Tj= -40...+150C (not tested, specified by design) Current sense rise time (60% to 90%) after change of load current IL = 2.5 5 A (not tested, specified by design) Open load detection voltage12) (off-condition) Tj=-40..150C: Internal output pull down (pin 6 to 2), VOUT=5 V, Tj=-40..150C Input and Status Feedback13) Input resistance see circuit page 7 Input turn-on threshold voltage Tj =-40..+150C: Tj =-40..+150C: Input turn-off threshold voltage Input threshold hysteresis Off state input current (pin 3), VIN = 0.4 V On state input current (pin 3), VIN = 5 V Delay time for status with open load after Input neg. slope (see diagram page 12) tson(IS) s s s V tsoff(IS) -- 30 100 tslc(IS) VOUT(OL) -2 10 3 -4 RO 5 15 40 k RI VIN(T+) VIN(T-) VIN(T) IIN(off) IIN(on) td(ST OL3) tdon(ST) tdoff(ST) VST(high) VST(low) IST(high) tbd -1.5 -1 20 -- 4 --0.5 -50 400 tbd 3.5 --50 90 -- k V V V A A s s s V Status delay after positive input slope (not tested, specified by design) Tj=-40 ... +150C: Status delay after negative input slope (not tested, specified by design) Tj=-40 ... +150C: Status output (open drain) Zener limit voltage Tj =-40...+150C, IST = +1.6 mA: Tj =-40...+25C, IST = +1.6 mA: ST low voltage Tj = +150C, IST = +1.6 mA: Status leakage current, VST = 5 V, Tj=25 ... +150C --5.4 ---- 13 1 6.1 ---- --6.9 0.4 0.7 2 A 12) 13) External pull up resistor required for open load detection in off state. If a ground resistor RGND is used, add the voltage drop across this resistor. Semiconductor Group 6 Preliminary Data Sheet BTS640S2 Truth Table Input level Normal operation Currentlimitation Short circuit to GND Overtemperature Short circuit to Vbb Open load Undervoltage Overvoltage Negative output voltage clamp L = "Low" Level H = "High" Level L H L H L H L H L H L H L H L H L Output level L H L H14) L L15) L L H H L18) H L L L L L Status level H L H H H H H H L16) L H (L19)) L H L H L H Current Sense IIS 0 nominal 0 >0 14) 0 0 0 0 0 Terms Ibb IL Input circuit (ESD protection) R V ON 6 4 I IN I ST 1 ST PROFET OUT GND 2 R GND IGND 7 V OUT 3 IN V bb IN I Vbb OUT ESD-ZD I GND I I I IS IS V VST IN 5 V IS ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). 14) 15) 16) 17) 18) 19) The voltage drop over the power transistor is typ.1.2V Semiconductor Group 7 Preliminary Data Sheet BTS640S2 Status output +5V + 5V + V bb Overvoltage protection of logic part R ST(ON) ST R ST IN ST RI Logic V Z2 GND ESDZD RV R IS IS ESD-Zener diode: 6.1 V typ., max 5 mA; RST(ON) < 440 at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). V Z1 GND R GND Signal GND Current sense output V IS I IS ESD-ZD GND R IS VZ1 = 6.1 V typ., VZ2 = 46 V typ., RI= 4 k typ, RGND= 150 , RST= 15 k, RIS= 1 k, RV= 15 k, Reverse battery protection + 5V - Vbb R ST IS IN ST IS RI Logic VZ1 Power Inverse Diode OUT ESD-Zener diode: 6.1 V typ., max 14 mA; RIS = 1 k nominal RV R IS Inductive and overvoltage output clamp + V bb V Z GND RGND Signal GND RL Power GND VON OUT GND The load RL is inverse on, temperature protection is not active RGND= 150 , RI= 4 k typ, RST 500 , RIS 200 , RV 500 , PROFET Open-load detection VON clamped to 47 V typ. OFF-state diagnostic condition: VOUT > 3 V typ.; IN low V bb R EXT OFF Out ST Logic R O V OUT Signal GND Semiconductor Group 8 Preliminary Data Sheet BTS640S2 GND disconnect V Ibb 4 6 high 3 1 OUT IS GND 2 V V IN ST VIS V GND V bb 7 5 IN ST IS Vbb OUT PROFET OUT GND 2 RL L 7 D 6 Vbb disconnect with charged external inductive load 4 bb 3 1 5 IN ST Vbb OUT PROFET Any kind of load. In case of Input=high is VOUT VIN - VIN(T+) . Due to VGND >0, no VST = low signal available. GND disconnect with GND pull up 4 3 1 5 IN ST IS Vbb OUT PROFET OUT GND 2 V V bb VV IN ST IS 7 6 If other external inductive loads L are connected to the PROFET, additional elements like D are necessary. Inductive Load switch-off energy dissipation E bb E AS 4 3 1 IN ST IS GND 2 ER V bb OUT PROFET OUT 6 7 EL ELoad V = GND 5 V bb Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND >0, no VST = low signal available. Vbb disconnect with energized inductive load 4 high 3 1 5 IN ST IS Vbb OUT PROFET OUT GND 2 7 6 Energy stored in load inductance: EL = 1/2*L*I L While demagnetizing load inductance, the energy dissipated in PROFET is 2 EAS= Ebb + EL - ER= VON(CL)*iL(t) dt, with an approximate solution for RL > 0 : IL* L IL*RL *(V + |VOUT(CL)|)* ln (1+ ) |VOUT(CL)| 2*RL bb EAS= V bb Normal load current can be handled by the PROFET itself. Semiconductor Group 9 Preliminary Data Sheet BTS640S2 Timing diagrams Figure 1a: Switching a resistive load, change of load current in on-condition: IN Figure 2a: Switching a lamp IN ST t don(ST) t doff(ST) ST *) VOUT t on V t off t slc(IS) t slc(IS) I Load 1 IIS t son(IS) t soff(IS) The sense signal is not valid during settling time after turn or change of load current. OUT IL Load 2 L t t Figure 2b: Switching a lamp with current limit: IN Figure 1b: Vbb turn on: IN ST Vbb VOUT VON(IS) Vbb I L IL I IS IIS t ST t proper turn on under all conditions Semiconductor Group 10 Preliminary Data Sheet BTS640S2 Figure 2c: Switching an inductive load: IN IN ST ST VOUT IL Figure 4a: Overtemperature: Reset if Tj I IS IIS t TJ t Figure 3a: Short circuit: shut down by overtempertature, reset by cooling Figure 5a: Open load: detection in ON-state, open load occurs in on-state IN IL IL(SCp) I L(SCr) IN ST VOUT I IS IL ST normal open normal t IIS Heating up may require several milliseconds, depending on external conditions IL(SCp) = 50 A typ. increases with decreasing temperature. t Semiconductor Group 11 Preliminary Data Sheet BTS640S2 Figure 5b: Open load: detection in ON- and OFF-state (with REXT), turn on/off to open load Figure 6b: Undervoltage restart of charge pump VON(CL) V on IN td(ST OL3) ST off-state on-state V OUT V bb(over) V I L open load V V bb(u rst) bb(o rst) bb(u cp) V bb(under) I IS t charge pump starts at Vbb(ucp) =4.7 V typ. Figure 6a: Undervoltage: Figure 7a: Overvoltage: IN IN ST ST not defined V bb V bb(under) Vbb Vbb(u cp) Vbb(u rst) IL V ON(CL) V bb(over) V bb(o rst) I L IIS t I IS t Semiconductor Group 12 off-state V bb Preliminary Data Sheet BTS640S2 Figure 8a: Current sense versus load current: 1.3 [mA] 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 4 5 [A] 6 IL 0.0 0 1 2 3 4 5 6 7 [A] 8 VON(NL) IL 0.1 0.2 RON Figure 9a: Output voltage drop versus load current: I IS [V] VON Figure 8b: Current sense ratio: 15000 k ILIS 10000 5000 0 [A] I L 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Semiconductor Group 13 Preliminary Data Sheet BTS640S2 Package and Ordering Code All dimensions in mm Standard TO-220AB/7 BTS640S2 Ordering code Q67060-S6307-A2 SMD TO 220AB/7, Opt. E3128 Ordering code BTS640S2 E3128A T&R: Q67060-S6307-A3 Semiconductor Group 14 |
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